Field of the Invention
The present invention relates to a data processing apparatus comprising a hierarchy of layers, each layer configured to generate data according to a protocol specific to that layer for passing to a next layer. More particularly, this invention relates to the use of synchronization information between such layers.
Description of the Prior Art
In a data processing apparatus, it is known for there to be multiple layers arranged in a hierarchy, wherein at least some of those layers are configured to process data and to generate, according to a protocol associated with that layer, processed data for passing to a next layer in the hierarchy. For example, trace monitoring is the technique of collecting real time data from a data processing apparatus indicative of the activities of the data processing apparatus and generating a trace stream indicative of that activity for passing to a trace analysis apparatus. An example of this type of trace monitoring is the Embedded Trace Macrocell (ETM) architecture provided by ARM Limited. This architecture provides an ETM unit embedded on-chip to monitor the activity of a processor core. Here, the processor core and ETM unit can be considered to be a hierarchy of two layers, in which the processor core processes data and passes some processed data to the ETM unit, the format of that processed data being according to a particular protocol that will be recognized by the ETM unit, and secondly the ETM unit can be considered to be a data processing layer configured to receive the data from the processor core and to generate the trace stream according to a protocol that will be recognized by the trace analysis apparatus.
In an arrangement such as an ETM unit connected to a processor core, it is known, in order for the bandwidth of data generated by the ETM unit (its processed data) to be used as efficiently as possible, that the meaning of particular data generated by the ETM unit will vary, depending on the context. Hence, the ETM unit is configured to generate additional synchronization information which provides semantic information allowing the processed data, i.e. the trace stream, to be correctly interpreted.
Typically, in the example of a processor core and an ETM unit, the trace stream generated by the ETM unit is written to a buffer of finite size. More particularly, such a buffer is normally arranged in a circular fashion, such that the oldest data contained therein is overwritten by the newest arriving data. This has the consequence that additional synchronization information will only be temporarily available, before being overwritten in the circular buffer. Hence, depending on the size of the circular buffer, such synchronization information must be output sufficiently often to be available in the buffer before being overwritten.
Also, it is known for the transport mechanisms for such processed data to be lossy, i.e. not all the processed data that was originally sent is received at its intended destination. For example bit errors could occur, rendering some processed data unusable, or some data could overflow in an internal buffer that forms part of the transport mechanism. In such situations some important information, such as synchronization information, could be lost, requiring synchronization information to be re-issued so that correct interpretation of the processed data can be carried out.
It is also known for such operating systems as Linux to offer instrumentation tools such as LTTng and ftrace, which dump trace information indicative of processing activities to a file. Synchronization is however typically not a critical issue for such tools, as the file size is not particularly strictly limited.
In data processing apparatuses such as a processor core connected to an ETM unit, it is known therefore that the ETM unit must output its synchronization information sufficiently frequently for a limited size trace buffer to contain enough information to allow the trace information temporarily buffered therein to be interpreted. However, the use of synchronization information becomes more complex when more than one data processing layer in a hierarchy of layers generates its processed data in a fashion which requires intermittent synchronization information for its interpretation. For example, considering a processor core and a tracing unit, the communication path between the processor core and the tracing unit may be arranged as a number of distinct channels, a particular channel being allocated to a particular process executing on the processor core, such that (whilst it is allocated to that process) information received over that channel may be interpreted as having come from the associated process. The mapping of channels to processes is context dependent, i.e. will depend on what processing activities the processor core is currently performing. Hence it is necessary for the processor core to provide this information if it is to be correctly interpreted. In addition there remains the same above-discussed need for the tracing unit to output its own synchronization information.
There a various ways in which such synchronization information from the processor core could be provided. Firstly, the synchronization information could be generated when a new process is started. However, depending on the buffer size into which the trace stream will be written, this is likely to be too infrequent, for the process could continue executing beyond the time when its original synchronization information has been overwritten in the buffer. Secondly, synchronization information could be output every time a particular channel is used. However, this has the clear drawback that it could easily result in an enormous amount of synchronization data being output stealing valuable bandwidth from the processed data that is being monitored. Thirdly, the synchronization information could be output on the nth time a channel is used. The drawback of this approach is defining n, since a suitable value will depend on the buffer size and frequency with which the channel is used.
Commonly owned co-pending U.S. patent application Ser. No. 12/385,319, the entire contents of which are hereby incorporated by reference, discloses a technique for inserting synchronization information in a trace system, wherein the addition of synchronization information to trace data is dependent on some downstream data processing behaviour, for example on how full a downstream trace buffer is.
The article “Traces Synchronization in Distributed Networks” by Eric Clement and Michel Dagenais, Journal of Computer Systems, Networks, and Communications, Vol. 2009 (2009), Article ID 190579, (available at http://www.hindawi.com/journals/jcsnc/2009/190579.html) provides some background discussion to these issues.
However, when multiple data processing layers that can add synchronization information exist in a data processing apparatus, it would be desirable to provide an improved technique for providing the synchronization information associated with the processed data passed between those layers.